The PLCPro Method Framework
Every PLCPro sequence is built using a consistent, deterministic workflow. This structure ensures that logic is predictable, transitions are explicit, and operators always know what the machine is doing and why. For each auto sequence in the program, a PLC Pro will:
OK to Continue
OK to Continue is the first and most important gate in every PLCPro sequence. It answers the single question: “Are we allowed to keep doing what we are doing?”
For most auto sequences, if we are not in Auto Mode it is not OK to Continue (Yes... it can be that simple.). For systems with distributed IO, it may be advisable to check an see if we are connected to and talking to the inputs and outputs required by the sequence. There may be safety gates or other interlocks that need to be in place. Each case will be unique.
If the OK to Continue conditions are not met, the sequence is programmed not to start or advance. This gives operators and maintenance personnel a simple troubleshooting question: “Is it OK to Continue?”
No Conflict
No Conflict ensures the sequence is not competing for resources with another sequence, a manual override, or a mutually exclusive command. This block prevents two pieces of logic from trying to control the same device at the same time — one of the most common causes of unpredictable behavior in traditional PLC programs.
Think of the No Conflict bit as a quick check to see if any other logic is using any of the outputs required to execute the sequence's intent. For example, a conveyor section may be used to transport parts either south or north. If being commanded to run south by a different sequence, then the No Conflict bit for the sequence that wants to run north should be false, preventing both sequences from operating the conveyor at the same time.
OK to Start
OK to Start verifies that the machine is in a valid starting state. This will always include a check that the sequence is not already running. Another condition to check before starting is that the machine is in a the correct starting state.
It is important to note that the OK to Start bit is ALWAYS conditioned by a timer. This guards against re-entry by ensuring that the conditions for starting are observed for multiple scans. This is also handy for giving "preference" to one sequence over another. For example, if two sequences have the same OK to Start conditions, but one has a longer timer than the other, then the sequence with the shorter timer will start first, while the other sequence waits for its timer to expire before it can start. Often these will be sequences that compete for the same physical resources, so the start of one is a conflict with the other.
Trigger
The sequence Trigger identifies the specific event or condition that causes the sequence to start. This could be a sensor input, an operator command, a handshake from a different sequence, or any other discrete event that signals the desire for the sequence to execute.
This is one of the simpler elements of a PLCPro sequence, but it is important to note that the trigger is not what allows the sequence to start. The trigger is simply the event that we are looking for to say "I want to start now". The trigger may be true for hours, days, or weeks... but if we are missing the OK to Continue, the Ok to Start, or No Conflict, then the sequence will not start.
Sequence Running
The Sequence Running is a bit that indicates the sequence is currently active. This bit is set when the sequence starts and remains true until the sequence completes or is reset. It serves as a key status indicator for operators and other logic in the program, allowing them to know when a particular sequence is in progress.
Sequence Running is always programmed in the same way: If its OK to Continue, and there is No Conflict for sequence resources, and its OK to Start, and the Sequence Running bot is false, and the Trigger is true, then latch the Sequence Running bit. Like OK to Continue, the Sequence Running bit is also used as a condition for advancing through the sequence steps. If the sequence is not running, then it should not advance, even if all other conditions for the next step are true. Sequence Running, along with the Sequence Step(s), are written as latched(OTL) bits. Latching these bits ensures that once a sequence starts, it will remember where in the sequence it is, allowing operation even through a power loss or E-Stop condition. The sequence can then pick up and run from where it left off once the conditions for running are restored.
Sequence Step(s)
The first Sequence Step is typically used to fire the first actuator or output in the sequence. Its logic is fairly simple: if it's Ok to Continue', and the Sequence Running bit is true, and the first step has not been started, then latch the first step bit.
The logic for each of the subsequent steps in the sequence is similar, but also includes conditions to check that the previous step has completed. For example: if it's Ok to Continue', and the Sequence Running bit is true, and the second step bit is false, and the first step has completed (limit switch made, prox detection, timer timed out, etc.), and the second step bit is not true, then latch the second step bit. This way, each step in the sequence is explicitly waiting for the previous step to complete before it advances, ensuring a deterministic flow throughout the sequence.
If any step fails to complete, then the sequence will not advance. Further on in the discussion, we will discuss PLC Pro techniques (HMI) to make clear to operators why a sequence is hung, allowing for quick resolution of most issues. But the key point is that if the condition(s) for completing the current step is or are not met, then the sequence will not advance, even if all other conditions are true.
Normal Done
The last step of the sequence is always the Normal Done bit. The Normal Done true state is used as a signal to issue any handshakes to other sequences or elements of the program (rate counters, etc.) and then reset the sequence.
Handshakes are also a key feature of the PLCPro Method. These allow complex builds with variables to be coded as a group of sequences, where the completion of one sequence might argue for the start of the next. Like a step, handshake bits are typically latched, and only unlatched either on use, or on a specific command from the operator through HMI.
The logic for the Normal Done step is similar to all of the other steps: if it's Ok to Continue', and the Sequence Running bit is true, and the last step has completed, and the Normal Done bit is false, then latch the Normal Done bit.
Immediately following the Normal Done programming, the next rung will detail the conditions for triggering a sequence reset. This may include several parallel conditions, but always starts with a branch that reads: "if it is Ok to Continue, and the Sequence Running bit is true, and the Normal Done bit is true, then assert (OUT - no latch) the Sequence Reset bit. The key point is that the reset is triggered by the Normal Done bit, ensuring that the sequence resets immediately after it completes.
Other branches may be added to this logic to define any other (think, "abnormal") conditions when the sequence should reset. For example, there may be a branch that allows the operator to indicate through HMI that they want to reset the sequence, or there may be a branch that resets the sequence if an E-Stop condition or a switch to Manual mode is detected (more on this in the discussion).
Link Sequence to Outputs
There is a section of the each sequence's programming between the sequence reset rung and the rungs where we handle the actual Sequence Reset where we Link Sequence to Outputs. Placement in the scan for this section is important, as it ensures that the outputs are not energized until the sequence is running and has advanced to the appropriate step, and that the outputs are de-energized immediately (on the next scan) when the sequence is reset.
That the section where we Link Sequence to Outputs is always just below the sequence rungs and before the reset serves another, less technical purpose as well: The maintenance tech troubleshooting the sequence will know where to look for all outputs associated with the sequence. Maintenance techs will also know that if an output is energized when it shouldn't be, then the issue is likely in the sequence logic, and if an output is not energized when it should be, then the issue is likely in the output logic. This makes troubleshooting much more intuitive and efficient.
Understand that when we refer to an output as above, this is not a reference to the actual output (see output mapping section). For example, if the sequence is controlling a conveyor, then the output we are referring to here is not the physical output card bit that runs the conveyor motor, but rather an internal bit that we will use as a command to run the conveyor. This internal bit will then be used in the logic for the physical output. Often, the sequence output will be described like, "Run conveyor forward for Off-Load Sequence", and may be grouped in the output section (see mapping outputs) with instructions from other sequences to run the same conveyor.
Output logic is typically handled with a series of parallel branches, where each branch corresponds to a specific output. Each branch starts with the same conditions: if it's Ok to Continue', and the Sequence Running bit is true, and the appropriate Sequence Step bit is true, and the next Sequence Step to signal that we are done with this output is false, then assert (OUT - no latch) the output bit. This section is programmed per the specific outputs and actuators required by the sequence, but the key point is that the outputs are directly tied to the sequence steps, ensuring a deterministic relationship between the sequence logic and the machine's physical actions.
Some outputs, for example many detented solenoid valves, may have special considerations based on their "latching" capability. Where outputs are latched based on the hardware layer, then it is often part of the sequence reset to also reset latched outputs.
Sequence Reset
The finalsection of the each sequence's programming is the Sequence Reset section. Here the PLC Pro will ensure that all bits internal to the sequence logic are reset (set to "false").
Often, sequence steps bits will all be part of a 32-bit word, where they can all be reset by simply writing a zero to the value of the word. Some sequence bits, such as Sequence Running and Normal Done require a specific unlatch (OTU) instruction. Where outputs are latched as part of the sequence, they will often be unlatched in the reset of the sequence.
Sequence reset is never dependent on the sequence steps or continue permissive. This ensures that if a sequence needs to be reset while it is running, or if it needs to be reset for startup or maintenance purposes, then the reset will not be prevented by the run state of the sequence.